memory addressing logic

8 bit De-multiplexer stage, not yet connected to the memory address register but is connected to the memory logic gates. the open scad file also contains several other redesigned components that greatly simplifies connections and clocking mechanisms.

http://nextbigfuture.com/2016/04/molecular-mechanical-computer-design.html

http://www.imm.org/Reports/rep046.pdf

the scad file also contains the other components that have been uploaded previously.
t.
Eventually i intend to parameterize t